Anna university Question Bank ECE Dept

Please provide me question paper for the ECE department of Anna university ?

as you are looking for the question paper for the ECE Department of anna university so here I am giving you the question paper of it ..

1. Determine whether an NMOS transistor with a threshold voltage of 0.7 V
is operating in the saturation region if V,, = 2 V and V,, = 3V.
2. Write down the equation for describing the channel length modulation
effect in NMOS transistors.
3. Write the expressions for the logical effort and parasitic delay of n input
NOR gc
4. Why dc ncrease the circuit delay?
5. Draw a pseuao NIVIU~inverter.
6. What are the advantages of differential flip flops?
7. State the objective of functionality test.
8. What are the test fixtures required to test a chip?
9. Write the Verilog module for an half adder.
10. What are the delay specifications available in Verilog HDL for modeling a
logic gate?

For the complete question paper I am attaching a PDF file with it ..

Attached Files Available for Download

Anna university ECE question paper .pdf (521.6 KB, 83 views)

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