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Old October 26th, 2017, 08:57 AM
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Default Re: DRDO Last Year Question Paper PDF

Previous year Defence Research & Development Organization [DRDO] CS (Computer Science) Question Paper is as follows:

Which of the following is true?
A. For every NFA there is an equivalent PDA.
B. Nondeterministic TMs are more powerful than deterministic TMs.
C. DPDAs and NPDAs are equivalent in power.
D. NFAs accept the class of CFLs.

Let L be a CFL. Then L’ must be
A. CFL but not regular.
B. Recursive.
C. Recursively Enumerable but not Recursive.
D. Regular but not CFL.


Which of the following is FALSE?
A. CFLs are closed under union but not closed under complement.
B. Regular sets are closed under intersection and Kleene Closure.
C. Recursive languages are closed under intersection but not closed under
complement.
D. Recursively enumerable languages are closed under union and
intersection.


Which of the following is NOT POSSIBLE?
A. Finding out a minimal DFA for any arbitrary regular language.
B. Constructing a deterministic TM for any arbitrary CFL.
C. Determining whether two CFGs generate the same language.
D. Given an arbitrary TM M (which halts on all inputs) whether the
complement of the language accepted by M is recursive.

Which of the following is FALSE?
A. Regular expressions and DFAs are equivalent.
B. A DPDA cannot accept by any arbitrary CFL.
C. The language accept by any TMs is a CFL.
D. Complement of every regular language is CFL.

8. Consider the languages L1 and L2 given below.
L1= {| M1 and M2 are NFAs and L (M1 )= L (M2)}
L2= {| M1 and M2 are TMs and L (M1 )= L (M2)}
Which of the following is true?
A. L1 is undecidable but L2 is decidable.
B. L2 is undecidable but L1 is decidable.
C. Both L1 and L2 are undecidable.
D. Both L1 and L2 are decidable.
9. Let A and B be languages corresponding to two decision problems πA and πB
respectively. Let A be NP – complete problem, then hat would not B NP.
Which of the following is true?
A. B is NP- complete
B. A proportional p B
C. B proportional p A
D. None of the above.


11. A 1KB RAM can be organized as an 8 K bit RAM.
A. Using a 1 to 8 line demultiplexer.
B. Using an 8 to 1 multiplexer.
C. Using an 8 – input OR gate.
D. None of the above.
12. A 2 KB RAM can be economically organized usingA.
64 numbers of 256 bit RAM chip and a 1/8 line decoder.
B. 64 numbers of 256 bit RAM chip and a 1/64 line decoder.
C. 8 numbers of 256 bit RAM chips and a 1/8 line decoder.
D. 8 numbers of 256 bit RAM chips and a 1/64 line decoder
13. With reference to RETURN instruction, which of the following statement is /
are true?
1. The instruction can be used only to take the flow of control back to the
program from which it initially jumped.
2.The instruction retrieves the address using the current stack pointer from
the stack and alters the control to the program pointed to by it.
3. The instruction works only if the registers used in the main program have
been pushed and later popped before its execution.
4.The instruction can be used only in conjunction with the call instruction.
A. 1
st and 2nd
B. 2
nd only
C. 1
st, 2nd and 3rd only
D. All the statement are true
14. In an n- CPU shared bus system, if is the probability that any CPU requests
the bus in a given cycle, the probability that only one CPU uses the bus is
given byA.
Nz(1-z)(n-1)
B. Z(1-z)(n-1)
C. N(1-z)n
D. (N-1)z(1-z)n

15. A variable X has been assigned fresh values in statements numbered 6, 9 and
12 in a 25- statement program which does not have any jump instructions.
This variable is used in statements numbered 7, 8, 10, 16 and 17.the statement
range where the register, used by the variable X, could be assigned to some
other variable areA.
8-9, 10- 12, 17- 25
B. 11, 18-25
C. 17-25
D. Non of the above
16. If the Intel Pentium processors, was not made compatible to programs written
for its predecessor, it could have been designed to be a faster processor.
A. The statement is true
B. The statement is false
C. The speed cannot be predicted.
D. Speed has nothing to do with the compatibility.
17. A certain snooping cache an snoop only an address lines. Which of the
following is true?
A. This would adversely affect the system if the write through protocol is
used.
B. This would run well if the write through protocol is used.
C. Data snooping is mandatory.
D. None of the above.
18. Repeated occurrence of identical interrupt during execution of this service
routine can result inA.
Program error.
B. Stack overflow.
C. Hardware error.
D. None of the above.
19. Micro programmed control is not fit for RISC architectures becauseA.
It tends to slow down the processor.
B. It consumes more chips area.
C. Handling a large number of registers is impossible in micro programmed
systems.
D. The 1 instruction / cycle timing requirement for RISC is difficult to
achieve for all instructions.
20. A certain RISC processor has 12register windows and 16 global registers.
Each window has 8 input, 16 local and 8 output registers. The total number of
registers in the processor is –
A. 312
B. 320
C. 296
D. 304
21. In a certain system the main memory access time is 1000 ns. The cache
memory is 10 times faster then the main memory uses the write through protocol.
If the hit ratio for read request is 0.92 and 85% of the memory requests generated
by the CPU are for the read, the remaining being for write, then the average time
considering both read and write request is –
A. 14.62 ns
B. 348.47 ns
C. 29.62 ns
D. 296.2 ns
22. Shown below are segments of a code run on a CISC and a RISC architecture
separately.
CISC RISC
MOV AX, 05 MOV AX, 00
MOV BX, 06 MOV BX, 05
MUL AX, BX; Multiply AX with BX MOV CX, 06
START: ADD AX, BX
LOOP START ; loop till
CX=0
If the MUL instruction takes 402 clock cycles, which of the following statement is
true?
A. The CISC code will faster by a factor of 1.8.
B. The RISC code will run aster by a factor of 2.8.
C. The CISC code will faster by a factor of 0.025.
D. The RISC code will run aster by a factor of 40.
Attached Files Available for Download
File Type: pdf DRDO CS (Computer Science) Question Paper.pdf (80.2 KB, 16 views)
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