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#1
April 27th, 2014, 12:38 PM
 Super Moderator Join Date: Jun 2011

Here I am looking for the Previous Years Question Paper of Gujarat Technological University (GTU) for Electronics and Communication Engineering 3rd Sem Digital Logic Design Exam, can you please provide me the same??

Yeah sure, here I am sharing the previous Years Question Paper of Gujarat Technological University (GTU) for Electronics and Communication Engineering 3rd Sem Digital Logic Design Exam

With logic diagram and truth table explain the working of 3 to 8 line decoder.

With logic diagram and truth table explain the working JK Flipflop.Also obtain its characteristic equation. How JK flip-flop is the refinement of RS flip-flop?

Design a counter with the following binary sequence:
0, 4,2,1,6 and repeat. Use JK flip-flops

With logic diagram and function table explain the operation of 4 to 1 line
multiplexer.

What is the function of shift register? With the help of simple diagram explain its working. With block diagram and timing diagram explain the serial transfer of information from register A to register B.

With respect to Register Transfer logic, explain Interregister Transfer with
necessary diagrams.

With logic diagram explain the operation of 4 bit binary ripple counter. Explain the count sequence. How up counter can be converted into down counter?

Prepare a detailed note on: Instruction Codes. 07

What is scratchpad memory? With diagram explain the working of a processor unit employing a scratchpad memory.

Briefly explain control organization. With diagram explain control logic with one
flip-flop per state.

Draw the block diagram of a processor unit with control variables and explain its operation briefly.

With simple diagram explain the working of control logic with sequence register
and decoder.

Gujarat Technological University
Nigam Nagar, Chandkheda,

Map:

Last edited by Aakashd; June 4th, 2019 at 05:06 PM.

#2
February 17th, 2015, 12:17 PM
 Super Moderator Join Date: Nov 2011
Re: GTU ECE 3rd Sem Digital Logic Design Exam Previous Years Question Papers

As you want I am providing Gujarat Technological University Electronics and Communication Engineering 3rd Sem Digital Logic Design Paper

Q.1 (a) Convert the following Numbers as directed:
(1) (52)10 = ( )2
(2) (101001011)2 = ( )10
(3) (11101110) 2 = ( )8
(4) (68)10 = ( )16
07
(b) Reduce the expression:
(1) A+B(AC+(B+C’)D) (2) (A+(BC)’)’(AB’+ABC)
07
Q.2 (a) Simplify the Boolean function:
(1)F(w,x,y,z) = ∑ (0,1,2,4,5,6,8,9,12,13,14)
(2)F(w,x,y) = ∑ (0,1,3,4,5,7)
07
(b) Explain with figures how NAND gate and NOR gate can be used as Universal gate. 07
OR
(b) Simplify the Boolean function:
(1) F = A’B’C’+B’CD’+A’BCD’+AB’C’
(2) F =A’B’D’+A’CD+A’BC
d=A’BC’D+ACD+AB’D’ Where “d ” indicates Don’t care conditions.
07
Q.3 (a) With logic diagram and truth table explain the working of 3 to 8 line decoder. 07
(b) With logic diagram and truth table explain the working JK Flipflop.Also obtain its
characteristic equation. How JK flip-flop is the refinement of RS flip-flop?
07
OR
Q.3 (a) Design a counter with the following binary sequence:
0, 4,2,1,6 and repeat. Use JK flip-flops
07
(b) With logic diagram and function table explain the operation of 4 to 1 line
multiplexer.
07
Q.4 (a) What is the function of shift register? With the help of simple diagram explain its
working. With block diagram and timing diagram explain the serial transfer of
information from register A to register B.
07
(b) With respect to Register Transfer logic, explain Interregister Transfer with
necessary diagrams.
07
OR
Q.4 (a) With logic diagram explain the operation of 4 bit binary ripple counter. Explain the
count sequence. How up counter can be converted into down counter?
07
(b) Prepare a detailed note on: Instruction Codes. 07
Q.5 (a) What is scratchpad memory? With diagram explain the working of a processor unit
07
(b) Briefly explain control organization. With diagram explain control logic with one
flip-flop per state.
07
OR
Q.5 (a) Draw the block diagram of a processor unit with control variables and explain its
operation briefly.
07
(b) With simple diagram explain the working of control logic with sequence register
and decoder.
07
__________________
#3
June 3rd, 2015, 11:25 AM
 Unregistered Guest

Quote:
 Originally Posted by Nilesh As you want I am providing Gujarat Technological University Electronics and Communication Engineering 3rd Sem Digital Logic Design Paper Q.1 (a) Convert the following Numbers as directed: (1) (52)10 = ( )2 (2) (101001011)2 = ( )10 (3) (11101110) 2 = ( )8 (4) (68)10 = ( )16 07 (b) Reduce the expression: (1) A+B(AC+(B+C’)D) (2) (A+(BC)’)’(AB’+ABC) 07 Q.2 (a) Simplify the Boolean function: (1)F(w,x,y,z) = ∑ (0,1,2,4,5,6,8,9,12,13,14) (2)F(w,x,y) = ∑ (0,1,3,4,5,7) 07 (b) Explain with figures how NAND gate and NOR gate can be used as Universal gate. 07 OR (b) Simplify the Boolean function: (1) F = A’B’C’+B’CD’+A’BCD’+AB’C’ (2) F =A’B’D’+A’CD+A’BC d=A’BC’D+ACD+AB’D’ Where “d ” indicates Don’t care conditions. 07 Q.3 (a) With logic diagram and truth table explain the working of 3 to 8 line decoder. 07 (b) With logic diagram and truth table explain the working JK Flipflop.Also obtain its characteristic equation. How JK flip-flop is the refinement of RS flip-flop? 07 OR Q.3 (a) Design a counter with the following binary sequence: 0, 4,2,1,6 and repeat. Use JK flip-flops 07 (b) With logic diagram and function table explain the operation of 4 to 1 line multiplexer. 07 Q.4 (a) What is the function of shift register? With the help of simple diagram explain its working. With block diagram and timing diagram explain the serial transfer of information from register A to register B. 07 (b) With respect to Register Transfer logic, explain Interregister Transfer with necessary diagrams. 07 OR Q.4 (a) With logic diagram explain the operation of 4 bit binary ripple counter. Explain the count sequence. How up counter can be converted into down counter? 07 (b) Prepare a detailed note on: Instruction Codes. 07 Q.5 (a) What is scratchpad memory? With diagram explain the working of a processor unit employing a scratchpad memory. 07 (b) Briefly explain control organization. With diagram explain control logic with one flip-flop per state. 07 OR Q.5 (a) Draw the block diagram of a processor unit with control variables and explain its operation briefly. 07 (b) With simple diagram explain the working of control logic with sequence register and decoder. 07